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user?s guide atm 40 0 4a liquid crystal display module
2 contents 1.0 m echanical diagram??????? ????????? . ??? 3 2.0 absolute maximum ratings???????????????? 4 3.0 description of terminals????????????????? . 4 4.0 optical characteristics?????????????????? 5 5.0 electrical characteristics????????????????? 5 6.0 timing characteristics??????????????? ??? . 6 7.0 block diagram?????????????????????? 7 8.0 display commands??????????????????? 8 9.0 reliability and lift time????????????????? 9 10.0 display instruction table??????????????? .. 9 1 1 .0 standard character pattern??????????????? .. 11
3 1.0 mechanical diagram 1.lc fluid: tn, stn (yellow-green) 4.temperature range: standard, wide 5.controller: s6a0069x01-c0cx 2.polarizer: reflective, transfletive, transmissive performance features 3.backlight: led 17 1 18 2 tel:0592-5550001 fax:0592-5550001-12 e-mail:vtronic@china.com vt404 a k xiamen arrow - tech el ectronic co., ltd. ATM4004A tel. :0592 - 5620018 fax.: 0592 - 56200 08
4 2.0 absolute maximum ratings item symbol min typ max unit operating temperature (standard) top 0 - 50 oc storage temperature (standard) tst - 20 - 70 oc operating t emperature (wide temperature) top - 20 - 70 oc storage temperature (wide temperature) tst - 30 - 80 oc input voltage vin vss vdd v supply voltage for logic vdd - vss 2.7 - 5.5 v supply voltage for lcd drive vdd - vo 3.0 4.6 6.5 v *w ide temperature range is available (operating/storage temperature as wide as - 20 ?? +70/ - 30 ?? +80 ?? ) ? 3.0 description of terminals pin no. pin name input/ output external connection function 1 vss ?a power vss:gnd 2 vdd ?a supply vdd: +5v 3 v0 ?a v lcd adjustment (nee d dismount r12) 4 rs input mpu register select signal ?0?:instruction register (when writing) busy flag & address counter (when reading) ?1?:data register (when writing & reading) 5 r/w input mpu read/write select signal ?0? for writing , ?1? fo r reading 6 vee ?a mpu vee: - 5v 7 e1 input mpu operation (data read/write) enable signal 8 e2 input mpu operation (data read/write) enable signal 9 / 16 db0 - db7 input mpu data bit 0~data bit 7 17 / 18 led ? + ? led ? - ? input led backlight power supply led ? + ? voltage type:4.2v max : 4.5v led ? - ? : gnd
5 4.0 optical characteristics for tn type display module (t a =25 ?? , v dd =5.0v ? 0.25v) item symbol condition min typ max unit viewing angle (horizontal) q cr 3 4.0 - 25 - - deg vie wing angle (vertical) f cr 3 4.0 - 30 - 30 deg contrast ratio cr f =0 , q =0 - 2 - response time (rise) tr f =0 , q =0 - 120 150 ms response time (fall) tf f =0 , q =0 - 120 150 ms for stn type display module (t a =25 ?? , v dd =5.0v ? 0.25v) item symbol condit ion min typ max unit viewing angle (horizontal) q cr 3 2.0 - 60 - 35 deg viewing angle (vertical) f cr 3 2.0 - 40 - 40 deg contrast ratio cr f =0 , q =0 - 6 - response time (rise) tr f =0 , q =0 - 150 250 ms response time (fall) tf f =0 , q =0 - 150 250 m s 5.0 electrical characteristics item symbol condition min typ max unit input voltage (high) vih h level 2.2 - vdd v input voltage (low) vil l level 0 - 0.6 v 0oc - 4.8 5.4 25oc 4.2 4.6 - recommended lc driving voltage (standard temp) vdd - vo 50oc 3.9 4.3 - v - 20oc - 6.4 7.2 0oc - 4.8 - 50oc - 4.3 - recommended lc driving voltage (wide temp) vdd - vo 70oc 3.7 4.2 - v power supply current idd vdd=5.0v, fosc=270khz - 1.0 2.0 ma led power supply voltage vfled r=6.8 w - 4.3 5. 0 v led power supply current ifled r=6.8 w - 500 800 ma
6 6.0 timing characteristics item symbol test condition min. typ. max. unit enable cycle time t c fig. a, fig. b 500 - - ns enable pulse width t w fig. a, fig. b 220 - - ns enable rise/fall time t r , t f fig. a, fig. b - - 25 ns rs, r/w set up time t su fig. a, fig. b 40 - - ns rs, r/w hold time t h fig. a, fig. b 10 - - ns data delay time t d fig. b - - 120 ns data set up time t dsu fig. a 60 - - ns data hold time t dh fig. a, fig. b 20 - - ns writ e timing read timing v ih1 v il1 v il1 ih1 il1 v v v ih1 v il1 v il1 v ih1 il1 v v ih1 il1 v valid data t su t h t w t h t f t r t dsu t dh t c rs r/w e db0~db7 v il1 v ih1 v il1 fig. a interface timing (data write) v ih1 v il1 v ih1 ih1 il1 v v v ih1 v il1 v ih1 v ih1 il1 v v ih1 il1 v valid data t su t h t w t h t f t r t dsu t dh t c rs r/w e db0~db7 v il1 t d v ih1 il1 v fig. b interface timing (data read)
7 7.0 block diagram lcd 40x4 u2 seg1- 40 com 16 8 led backlight 2. vdd 1. vss 3. vo 4. rs 5. r/w 7. e1 16. db0 9. db7 ~ a bl+ k bl- u3 40 80 80 16 8. e2 com 16 16 u1 u4 80 u5 seg1- 40 u4 40 80 u6 segment segment segment segment u1 u & u 1 4 6.vee vss vo vdd vr +5v standard temp range vss vo vdd vr +5v wide temp range - 5v vr = 10k w ~ 20k w
8 vdd - vo: lcd driving voltage vr: 10k - 20k |? 8.0 display command parameter rs r/w db7 db6 db5 db4 db3 db2 db1 db0 note executing time fosc=270 khz clear display 0 0 0 0 0 0 0 0 0 1 write "20h" to ddram and set ddram address to "00h" from ac 1.52ms cursor home 0 0 0 0 0 0 0 0 1 * s et ddram address to "00h" from ac and return cursor to its original position if shifted. the contents of ddram are not changed 1.52ms entry mode set 0 0 0 0 0 0 0 1 1/d s assign cursor moving direction and enable the shift of entire display 38 | s d isplay on/off 0 0 0 0 0 0 1 d c b set display(d), cursor(c), and blinking of cursor(b) on/off control bit. 38 | s cursor / display shift 0 0 0 0 0 1 s/c r/l * * set cursor moving and display shift control bit, and the direction, without changing of ddram data. 38 | s function set 0 0 0 0 1 dl n f * * set interface data length (dl: 8 - bit/4 - bit), numbers of display line (n: 2 - line/1 - line) and, display font type (f:5x10 dots/5x8 dots) 38 | s set cg ram address 0 0 0 1 ac5 ac4 ac3 ac2 ac1 ac0 set ddram add ress in counter 38 | s set dd ram address 0 0 1 ac6 ac5 ac4 ac3 ac2 ac1 ac0 set ddram address in counter 38 | s read busy flug/address counter 0 1 bf ac6 ac5 ac4 ac3 ac2 ac1 ac0 whether during internal operation or not can be known by reading bf. th e contents of address counter can also be read write data 1 0 d7 d6 d5 d4 d3 d2 d1 d0 write data into internal ram (ddram/cgram). 38 | s read data 1 1 d7 d6 d5 d4 d3 d2 d1 d0 r ead data from internal ram (ddram/cgram). 38 | s
9 9.0 reliability and life time 1.reliability test evaluations and asse ssment* storage condition content current consumption oozing contrast other appearances operation at high temperature and humidity 40oc,90% rh,240hrs twice initial value or less none more than 80% of initial value no abnormality high temperature storage 60oc, 240hrs twice initial value or less none more than 80% of initial value no abnormality low temperature storage - 20oc, 240hrs twice initial value or less more than 80% of initial value no abnorm ality *evaluations and assessment to be made two hours after returning to room temperature (25 o c5 o c). *the lcds subjected to the test must not have dew condensation. 2. liquid crystal panel service life 50,000 hours minimum at 25 ? 10 ?? ,45 ? 20%rh. 10.0 display instruction table command r s r/ w db 7 db 6 db 5 db 4 db 3 db 2 db 1 db 0 description executing time fosc=250k hz clear display 0 0 0 0 0 0 0 0 0 1 clears display & ret urns to address 0. 1.64ms curso r at home 0 0 0 0 0 0 0 0 1 x returns cursor to ad dress 0. also returns the dis play being shifted to the original position. ddram con tents remain unchanged. 1.64ms entry mode set 0 0 0 0 0 0 0 1 i/d s i/d: set cursor mov ing direction i/d=1: increment i/d=0: decrement s: specify shift of display s=1: the display is shifted s=0: the display is not shifted 40s
10 display on/off control 0 0 0 0 0 0 1 d c b display d=1: displa y on d=0: di splay off cur sor c=1: cursor on c=0: cu rsor off brink b=1: brink on b=0: br ink off 40s cursor / display shift 0 0 0 0 0 1 s/c r/l x x moves cursor or shif ts the display w/o changing dd ram contents s/c=0: cursor shift ( ram unchanged) s/c=1: display shift (ram unchanged) r/l=1: shift to the right r/l=0: shift to the left 40s function set 0 0 0 0 1 dl n f x x sets data bus length (dl), # of display lines (n), a nd character fonts (f). dl=1: 8 bits f=0: 5x7 dots dl=0: 4 bits f=1: 5x10 dots n=0: 1 line display n=1: 2 lines display 40s set cg ram address 0 0 0 1 character generator (cg) ram address sets cg ram address. cg ram data is sent and rec eived after this instructi on . 40s set dd ram address 0 0 1 display data (dd) ra m address / cursor address sets dd ram address. dd ram data is sent and rec eived after this instructi on. 40s busy flag / address read 0 1 b f address counter used for both dd & cg ram ad dress reads busy flag (bf) and address counter cont ents. 40s write data 1 0 write data writes data into ddr am or cgram. 46s read data 1 1 read data reads data from ddra m or cgram. 46s
11 11.0 standard character pattern note: the character generator ram is the ram with which the user can rewrite character patterns by program.

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